Structured computer organization Questions & Answers

Tanenbaum's central organizing principle is the concept of hierarchical levels of abstraction, often referred to as 'virtual machines.' He describes a computer system as a series of layers, each built upon the one below it. Each level provides a more abstract interface, hiding the complexities of the lower levels, making the system easier to understand, design, and program. This layered approach is fundamental to understanding modern computer architecture.

The book typically describes several levels: the Digital Logic Level (gates, flip-flops), the Microarchitecture Level (microprogram, datapath), the Instruction Set Architecture (ISA) Level (machine language instructions), the Operating System Machine Level (system calls, virtual memory), and sometimes the Assembly Language Level. Each level represents a different abstraction, from the physical hardware up to the software interface seen by application programmers.

While often used interchangeably, Tanenbaum implicitly or explicitly distinguishes them. Computer architecture refers to the attributes of a system visible to a programmer, such as the instruction set, number of registers, and memory addressing techniques. Computer organization, which is the focus of the book, deals with how these architectural attributes are implemented, including the control signals, memory technology, and physical interconnections. It's the 'how' versus the 'what'.

The ISA level is crucial because it defines the interface between hardware and software. It specifies the set of instructions a processor can execute, the data types it can handle, the registers available, and the memory addressing modes. This level acts as a contract: any program written in the ISA will run on any machine that implements that ISA, regardless of its underlying microarchitecture, ensuring software compatibility and portability.

Microprogramming is a technique for implementing the control unit of a CPU. Instead of hardwiring the control logic, a microprogrammed control unit uses a small, fast memory (control store) to hold a sequence of microinstructions. Each machine language instruction is executed by fetching and executing a sequence of these microinstructions. This approach offers flexibility, allowing for easier design changes, bug fixes, and even emulation of different ISAs.

The datapath is the part of the CPU that performs data processing operations. It consists of functional units like the Arithmetic Logic Unit (ALU), registers, and internal buses that connect them. The datapath is responsible for fetching instructions, decoding them, fetching operands, executing operations, and storing results. Its design directly impacts the CPU's performance and the types of operations it can efficiently execute.

The book explains the memory hierarchy as a multi-level structure designed to balance speed, cost, and capacity. It typically includes fast, small, and expensive cache memory at the top, followed by slower, larger, and cheaper main memory, and finally, even slower, larger, and cheaper secondary storage (like hard drives). The goal is to make the system appear to have the speed of the fastest memory and the capacity of the slowest.

The book covers several methods for handling I/O. Programmed I/O involves the CPU constantly polling the I/O device to check its status or transfer data, which is inefficient. Interrupt-driven I/O allows the device to signal the CPU when it needs attention, freeing the CPU for other tasks. Direct Memory Access (DMA) is the most efficient, allowing I/O devices to transfer data directly to and from main memory without CPU intervention, except for setup.

Pipelining is a technique used to improve CPU performance by allowing multiple instructions to be processed concurrently in different stages of execution. Instead of waiting for one instruction to complete before starting the next, a pipeline breaks down instruction execution into stages (e.g., fetch, decode, execute, write-back) and processes different instructions in different stages simultaneously. This increases instruction throughput, making the CPU faster.

RISC (Reduced Instruction Set Computer) architectures feature a small, simple, and fixed-length instruction set, with most operations performed on registers, and memory access limited to load/store instructions. CISC (Complex Instruction Set Computer) architectures have a large, complex, and variable-length instruction set, often with instructions that perform multiple operations and directly access memory. RISC aims for faster execution of simple instructions, while CISC aims for fewer instructions per program.

The book introduces parallelism as a way to achieve higher performance by performing multiple operations simultaneously. It discusses various forms, including instruction-level parallelism (e.g., pipelining, superscalar execution), data-level parallelism (e.g., vector processors), and thread-level parallelism (e.g., multi-core processors). The goal is to exploit concurrency inherent in tasks to speed up computation, though it introduces challenges in design and programming.

The operating system machine level is a virtual machine created by the operating system. It provides a more convenient and powerful interface for application programmers than the raw ISA. This level includes concepts like processes, virtual memory, files, and system calls. It manages resources, protects programs from each other, and handles I/O, abstracting away many hardware details and providing a stable environment for applications.

Tanenbaum emphasizes this because a deep understanding of computer systems requires appreciating how each level contributes to the overall functionality and how they interact. Problems at one level can manifest at another, and optimizing performance often involves making informed decisions across different layers. This multi-level perspective helps designers and programmers create more efficient, reliable, and robust systems.

A bus is a collection of parallel wires or optical fibers used to connect various components within a computer system, such as the CPU, memory, and I/O devices. It serves as a shared communication pathway, allowing data, addresses, and control signals to be transmitted between these components. Buses are critical for system integration and performance, though they can become a bottleneck if not designed efficiently.

Virtual memory is a memory management technique that gives each program the illusion of having its own large, contiguous address space, even if the physical memory is fragmented or smaller. It achieves this by using a combination of RAM and disk space, translating virtual addresses generated by programs into physical addresses. This allows programs larger than physical memory to run and provides memory protection between processes.